EDAPS 2025: IEEE ELECTRICAL DESIGN OF ADVANCED PACKAGING AND SYSTEMS
PROGRAM

Days: Monday, December 15th Tuesday, December 16th Wednesday, December 17th

Monday, December 15th

View this program: with abstractssession overviewtalk overview

11:30-12:30Lunch
12:30-12:50 Session 1: Sponsor Seminar 1

【Sponsor Seminar 1】AI driven design and 3D-IC design automation

Tadaaki Hitomi (Cadence)

12:50-13:00Break
13:00-13:45 Session 2: Keynote Speech 1

【Keynote Speech 1】Beyond Moore's Law: The Chiplet Revolution in Semiconductor Packaging

Yasumitsu Orii (Rapidus)

13:45-14:00Break
14:00-15:00 Session 3: Tutorial 1

【Tutorial 1】Fundamentals of Electrical Design for Advance Packaging and Heterogeneous Integration

Rohit Sharma (Indian Institute of Technology Ropar)

15:00-15:15Break
15:15-16:15 Session 4: Tutorial 2

【Tutorial 2】The Evolution of mmWaveAntenna in Package Toward a Connected Intelligent Future

Atom O. Watanabe (IBM T.J. Watson Research Center)

16:15-16:30Break
16:30-17:30 Session 5: Tutorial 3

【Tutorial 3】Fundamentals of Machine Learning and Macromodeling for High-Speed Interconnects and Advanced Packaging

Tom Dhaene and Thijs Ullrick (Ghent University - imec)

17:30-18:00Break
Tuesday, December 16th

View this program: with abstractssession overviewtalk overview

09:30-09:45 Session 6: Opening Remarks

【Opening Remarks】

Hideki Sasaki (Rapidus)

09:45-10:30 Session 7: Keynote Speech 2

【Keynote Speech 2】Heterogeneous Integration - A Means to continue Moore's Law

Madhavan Swaminathan (Penn State University)

10:30-10:40Break
10:40-12:00 Session 8: Oral Session

Oral Session1: Next Generation Memory Devices and their Interconnection

10:40
Design of Chiplet Interconnects Considering Crosstalk Induced from Meshed Ground Plane (abstract)
PRESENTER: Jiwoon Moon
11:00
Signal Integrity Analysis of High-Speed Chiplet Interconnection Considering Surface Roughness Based on Huray Model (abstract)
PRESENTER: Jonghyeon Lee
11:20
Mem-Village: A Hybrid HBF-HBM Architecture on Glass for Ultra-Scale AI Inference Systems (abstract)
PRESENTER: Hyuni Lee
11:40
Compact and robust holographic memory for optically reconfigurable gate arrays (abstract)
PRESENTER: Minoru Watanabe
12:00-13:10Lunch Break
13:10-13:30 Session 9: Sponsor Seminar 2

【Sponsor Seminar 2】 Design Environment for Advanced packaging

Yoko Fujita (Zuken)

13:30-14:50 Session 10: Oral Session

Oral Session 2: Single and Power Integrity

13:30
Electrical Performance of Interconnects in an Organic Interposer Targeted for Chiplet Applications (abstract)
PRESENTER: Ying Ying Lim
13:50
Uncertainty Quantification Using Riemannian Tensor Train Completion for Polynomial Chaos (abstract)
PRESENTER: Ziyuan Wang
14:10
Verification of channel crosstalk suppression effects due to differences in cable length using mode-division multiplexed transmission method (abstract)
PRESENTER: Hayato Yatabe
14:30
Estimation of Power Bus Resonance Suppression by Lossy Resonator Filter in the Wi-Fi Band Using Equivalent Circuit Model (abstract)
PRESENTER: Sho Kanao
14:50-15:00Break
15:00-16:20 Session 11: Oral Session

Oral Session3: Advanced Packaging

15:00
A Novel Study on the Effect of Temperature Cycle Testing on the Transmission Performance of Sub-2 micron Fine-Wiring for Glass Substrates (abstract)
PRESENTER: Masaya Tanaka
15:20
Compact 3D-SiP Power IC Packaging with Thermal Performance Improvement (abstract)
PRESENTER: Poyu Tsai
15:40
Vector Fitting Method in Transient Thermal Analysis for Heterogeneous Multilayered Packaging (abstract)
PRESENTER: Fong-Rong Bai
16:00
Asymmetric Organic Cores to Reduce Semiconductor Substrate Warpage (abstract)
PRESENTER: Ryota Yambe
16:20-16:40Break
16:40-17:50 Session 12: Poster Session

Poster Session

20-H Rule of Power Ground Plane of Printed Circuit Board and Clustering of Electric Near-Field Distribution (abstract)
Statistical Eye-Diagram Estimation Method for PAM-4 Based High-speed Channel Considering Crosstalk (abstract)
PRESENTER: Yuchul Jung
Achieving 32 Gbps in UCIe-S 2D-Packaging Based on Microstrip Routing on Glass Substrates (abstract)
PRESENTER: Yuchi Yang
Guided by Uncertainty: Adaptive Frequency Sampling Using Gaussian Processes (abstract)
PRESENTER: Thijs Ullrick
Comprehensive Characterization of Inkjet Printer Ag Film on Paper Substrate for Sensor Electrodes (abstract)
PRESENTER: Akanksha Arya
Probed Measurement Techniques for 100 Gbit/s D-band Wireless Link Experiments (abstract)
PRESENTER: Samuel Rimbaut
Pressure-Bonding of GaN-HEMT Die to Graphite Carbon for heat dissipation (abstract)
PRESENTER: Koji Aramaki
Temperature Dependence of Threshold Voltage for Interconnect IDDQ Testing in 3D Stacked ICs Using an Offset-Cancellation-Type Comparator (abstract)
PRESENTER: Masaki Hashizume
Effect of Wiring Geometry Modification on Signal Integrity in Silicon-Interposer Interconnect (abstract)
PRESENTER: Yosei Kawamoto
Physics-Intuitive Micro-Modeling Circuits (MMC) for Fast Analysis of Finite Dielectric Problems (abstract)
PRESENTER: Chengyi Cao
17:50-18:10Break
Wednesday, December 17th

View this program: with abstractssession overviewtalk overview

09:00-09:45 Session 13: Keynote Speech 3

【Keynote Speech 3】Recent Developments and Future Trends in HBM for AI Applications

Stephen Morein (SAIMEMORY Corp.)

09:45-10:30 Session 14: Keynote Speech 4

【Keynote Speech 4】AI for Signal and Power Integrity: From Physics-Guided Learning to Intelligent Electronics Design

En-Xiao Liu (A*STAR Institute of High Performance Computing)

10:30-10:40Break
10:40-12:00 Session 15: Oral Session

Oral Session 4: Machine Learning and EDA

10:40
Memory-Encoded DeepONet (M-DeepONet) for Transient Circuit Behavioral Modeling (abstract)
PRESENTER: Xu Chen
11:00
Chiplet Placement and Routing Agent for UCIe Interfaces Considering Thermal and Signal Integrity (abstract)
PRESENTER: Hyunseo Uhm
11:20
Switch Transformer-based Reinforcement Learning Method for Power Supply Induced Jitter (PSIJ) Reduction in High Bandwidth Memory (HBM) (abstract)
PRESENTER: Jaegeun Bae
11:40
Hierarchical Reinforcement Learning-based Co-Optimization of Package Substrate Design for Multiple Power Domain 3D-ICs (abstract)
PRESENTER: Seunghun Ryu
12:00-12:50Lunch Break
12:50-13:10 Session 16: Sponsor Seminar 3

【Sponsor Seminar 3】System Engineering in the Silicon to Systems era

Jayraj Nair (ANSYS)

13:10-13:30 Session 17: TC Session

TC Session: Activities of the IEEE EPS Technical Committee on Electrical Design, Modeling, and Simulation

Antonio Maffucci (University of Cassino and Southern Lazio, Cassino)

Xu Chen (University of Illinois)

Hideki Sasaki (Rapidus)

13:30-14:50 Session 18: Oral Session

Oral Session 5: RF and Antenna in Package

Chair:
13:30
Robust High-Frequency Wirebonding of a Power Amplifier to a Wideband D-band Antenna Array (abstract)
PRESENTER: Samuel Rimbaut
13:50
Tunable Graphene based Terahertz Bandstop Filter for Semiconductor Packaging Applications (abstract)
PRESENTER: G Challa Ram
14:10
A Velocity-Aware Density Peaks Clustering Method with Curb Filtering for Millimeter-Wave Radar (abstract)
PRESENTER: Shixian Su
14:30
High-Performance Horizontally Polarized Bow-Tie Slot Antenna for Next-Generation Wi-Fi 7 Systems (abstract)
PRESENTER: Hao Deng
14:50-15:00Break
15:00-16:20 Session 19: Oral Session

Oral Session 6: EMI Countermeasures

15:00
Suppression of Connector Radiation Coupling to Antenna by Phase Cancellation (abstract)
PRESENTER: Chih-Yu Fang
15:20
Design and Measurement of Ultra-wideband Bidirectional Absorptive Common Mode Filter (abstract)
15:40
Design of a Hybrid Common-Mode Filter Based on Electromagnetic Bandgap and Defected Ground Structure for Wideband Noise Suppression (abstract)
PRESENTER: Jinwook Lee
16:00
An Ultra-Lightweight CNT-Aerogel Absorber for Broadband Noise Suppression on High-Speed Packages (abstract)
PRESENTER: Sho Muroga
16:20-16:45 Closing

Award Ceremony &Closing Remarks

Hideki Sasaki